Multiple core systems require an allocation of tasks between multiple cores.
Contemporary system on chips includes multiple cores and peripherals. Peripherals may be Direct Memory Access engines or Digital Signal Processing accelerators. Applications on these system on chips are broken to multiple tasks that can run in parallel on the cores and the peripherals. Usually when a hardware peripheral completes a job—a software task should be executed in order to process the output of the peripheral. For instance, when DMA transfer is complete a destination buffer should be processed. All these peripherals may generate interrupts. These interrupts can be sent to a master core, stop the execution flow of the master core, reduce the efficiency of the system and increase the latency of tasks the peripheral may release.